This present application pertains to a phase detection method for clock recover by utilizing a phase detector that evaluates pulse shape features.
Timing recovery is a critical receiver function in high-speed communication systems. The receiver clock must be continuously adjusted in its frequency and phase to optimize the sampling instants of the received data signal and to compensate for frequency drifts between the oscillators used in the transmitter and receiver clock circuits. Usually, a clock synchronizer should perform both functions. In some cases an additional phase adjustment is needed.
Gardner, “Phaselock Techniques” Wiley, 1970, is a classical text on phase-locked loops (PLLs). Buchwald, Martin describes in “Integrated Fiber-Optic Receivers”, Kluwer, 1995, in particular chapter 4 (later referred to as Buchwald), many state-of the art clock recovery solutions for broadband communication systems e.g. high speed optical systems). Bergmans, “Digital Baseband Transmission and Recording”, Kluwer, 1996, in particular chapter 9, provides a modern classification and introduces the timing error detector (TED) terminology. Although timing error or phase error may be considered to be more precise we prefer the phase detector terminology because it is used by practitioners. Meyr, Moeneclaey, Fechtel, “Digital Communication Receivers”, Wiley, 1998, chapter 2, (later referred to as Meyr) explains terminology and introduces performance analysis methods for TEDs.
One kind of timing recovery methods, which are also referred to as self-timing or clock synchronizing methods, exploits some of pulse shape characteristics described e.g. by B. R. Saltzberg in “Timing recovery for synchronous binary data transmission”, Bell. Syst. Tech. J., vol. 46, pp. 593-622, March 1967. The most frequently used synchronizers of this class compare the threshold crossings of the received base-band signal with the sampling phase. The mean location of the crossings is estimated and the optimum sampling instant and maximum eye opening are assumed to be halfway between these crossings as e.g. described by J. D. H. Alexander in “Clock Recovery from Random Binary Data”, Elect. Lett., vol. 11, pp. 541-542, October 1975 and by C. R. Hogge in “A Self-Correcting Clock Recovery Circuit”, IEEE J. Lightwave Tech., vol. 3, pp. 1312-1314, December 1985. More specifically, in accordance with the so-called Alexander's clock recovery and data retiming circuit, three binary samples of the data signal are available: a is the previous data value, b is a sample of the data at the transition and c is the current data value. If a=b≠c the clock is early and should be slowed down. If a≠b=c the clock is late and should be speeded up. If a=b=c no data transition occurred and nothing should be done in this case. The case a=c≠b should not happen in phase-lock but it may occur due to frequency error or due to high noise.
A similar disclosure can also be found in patent literature. B. Joseph, H. Syang-Myau and R. Roopa describe in WO 02/30035 A1 titled “SYMBOL TIMING RECOVERY METHOD FOR LOW RESOLUTION MULTIPLE AMPLITUDE SIGNALS” (Apr. 11, 2002) symbol timing in a system, which does not provide a carrier corresponding to a symbol frequency. By collecting a histogram of samples for a predetermined number of symbol times symbol edges and a maximum eye opening are determined. Specifically an average, weighted average, or other method is applied to determine an average timing for maximum eye opening for each symbol time. Eight-fold over-sampling is employed.
A data-aided synchronizer described by K. H. Mueller and M. Müller in “Timing recovery in digital synchronous data receivers”, IEEE Trans. Commun., vol. COM-24, pp. 516-531, May. 1976, uses the sampled signal and receiver decisions for producing the timing function. This method yields relatively high variance estimates of the timing error, which is avoided in data selective methods as e.g. explained by A. Jennings and B. R. Clarke in “Data-Sequence Selective Timing Recovery for PAM Systems”, IEEE Trans. Commun., vol. COM-33, pp. 729-731, July. 1985.
European patent application number 03004079.4 and PCT application PCT/EP2004/001838 both titled “Self-timing method for adjustment of a sampling phase in an oversampling receiver and circuit” disclose a self-timing method and circuit for receivers performing two-fold oversampling. Histograms of the quantized amplitudes are measured for each of the two sampling instants and a measure of histogram similarity called population difference parameter is either maximized or minimized. More specifically, the quantized amplitudes are counted wherein one counter is provided for each possible digital value and each sampling instant. Then the absolute difference is calculated between the counters of a counter pair which count the same digital value at the two different sampling instants. The sum of all absolute differences of all counter pairs is referred to as population difference parameter. Finally, the sampling phase(s) is adjusted that the population difference parameter is maximized or minimized.
The best timing phase for a given system depends on the overall impulse response and thus on the characteristics of the communication channel.
Besides noise, most problems disturbing timing recovery circuits in optical data transmission systems are caused by signal distortions, particularly due to intersymbol interference (ISI), from chromatic dispersion, polarization mode dispersion, self-phase modulation etc. To the best of our knowledge, none of the well-known synchronizers (cf. e.g. Buchwald) used in current practical systems is able to cover such a wide spectrum of distortion as synchronizers comprising a phase detector described in this patent. We will constrain the invention explanation to the case of binary optical transmission. However, this fact does not limit the application of the inventive synchronizer in arbitrary binary or multilevel PAM (Pulse Amplitude Modulation) transmission systems.
Further, the Gray code is known (U.S. Pat. No. 2,632,058). It is an encoding scheme of numbers so that adjacent numbers have a single digit differing by 1. The relevant Gray codes for this application are:
TABLE 1decimal01234567Gray000001011010110111101100
The Gray code is called reflected because it can be generated recursively. Starting from a Gray code having 2q binary digits (e.g. q=1, Gray code: 0, 1). Write it forwards, then backwards (0, 1, 1, 0). Then prepend 0s to the first half and 1s to the second half (00, 01, 11, 10) in order to obtain a Gray code having 2q+1 digits.
It is the object of this invention to provide a robust phase detection method and a corresponding circuit that will be able to cope with serious distortions present in optical transmission systems.